/*--------------------------------------------------------------------------
Example.c
****************************************
**  Copyright  (C)    2021-2022   **
**  Web:              http://rothd.cn   **
****************************************
--------------------------------------------------------------------------*/

#include "MC3172.h"

void TIMER_COMPARER_EXAMPLE(u32 timer_sel)
{
    INTDEV_SET_CLK_RST(timer_sel,(INTDEV_RUN|INTDEV_IS_GROUP0|INTDEV_CLK_IS_CORECLK));

    TIMER_SET_OVERRIDE_GPIO(timer_sel,(
                                       TIMER_P3_OVERRIDE_GPIO|TIMER_P3_PULL_UP| \
                                       TIMER_P2_OVERRIDE_GPIO| \
                                       TIMER_P1_OVERRIDE_GPIO| \
                                       TIMER_P0_OVERRIDE_GPIO) \
                           );

    TIMER_SET_OUTPUT_EN(timer_sel,(TIMER_P0_OUTPUT_ENABLE |TIMER_P1_OUTPUT_ENABLE |TIMER_P2_OUTPUT_ENABLE |TIMER_P3_OUTPUT_ENABLE| \
                                   TIMER_P4_OUTPUT_DISABLE|TIMER_P5_OUTPUT_DISABLE|TIMER_P6_OUTPUT_DISABLE|TIMER_P7_OUTPUT_DISABLE));

    TIMER_SET_OUT_PORT(timer_sel,(TIMER_P0_IS_COMPARER0|TIMER_P1_IS_COMPARER1|TIMER_P3_IS_COMPARER2|TIMER_P2_IS_COMPARER3));

    TIMER_SET_COMPARER_MODE(timer_sel,(TIMER_COMPARER3_NOT_FORCE|TIMER_COMPARER2_NOT_FORCE|TIMER_COMPARER1_NOT_FORCE|TIMER_COMPARER0_NOT_FORCE));

    TIMER_SET_MAIN_CNT_BEGIN_VALUE0(timer_sel,TIMER_MAIN_CNT_COUNT_UP,0x00000000);
    TIMER_SET_MAIN_CNT_END_VALUE0(timer_sel,0x1000);
    TIMER_SET_MAIN_CNT_BEGIN_VALUE1(timer_sel,TIMER_MAIN_CNT_COUNT_DOWN,0x00008000);
    TIMER_SET_MAIN_CNT_END_VALUE1(timer_sel,0x00007000);
    TIMER_SET_CMD(timer_sel,TIMER_CMD_RESTART);

    TIMER_SET_COMPARER0_VALUE0_0(timer_sel,TIMER_COMPARER_OUTPUT0,0xf2);
    TIMER_SET_COMPARER0_VALUE0_1(timer_sel,TIMER_COMPARER_OUTPUT1,0x1f2);
    TIMER_SET_COMPARER0_VALUE1_0(timer_sel,TIMER_COMPARER_OUTPUT0,0x7777);
    TIMER_SET_COMPARER0_VALUE1_1(timer_sel,TIMER_COMPARER_OUTPUT1,0x7666);

    TIMER_SET_COMPARER1_VALUE0_0(timer_sel,TIMER_COMPARER_INV,0x1e4);
    TIMER_SET_COMPARER1_VALUE0_1(timer_sel,TIMER_COMPARER_HOLD,0x553);
    TIMER_SET_COMPARER1_VALUE1_0(timer_sel,TIMER_COMPARER_INV,0x7291);
    TIMER_SET_COMPARER1_VALUE1_1(timer_sel,TIMER_COMPARER_HOLD,0x327);

    TIMER_SET_COMPARER2_VALUE0_0(timer_sel,TIMER_COMPARER_OUTPUT0,0x202);
    TIMER_SET_COMPARER2_VALUE0_1(timer_sel,TIMER_COMPARER_INV,0x303);
    TIMER_SET_COMPARER2_VALUE1_0(timer_sel,TIMER_COMPARER_OUTPUT0,0x189);
    TIMER_SET_COMPARER2_VALUE1_1(timer_sel,TIMER_COMPARER_INV,0x377);

    TIMER_SET_COMPARER3_VALUE0_0(timer_sel,TIMER_COMPARER_OUTPUT0,0xf12);
    TIMER_SET_COMPARER3_VALUE0_1(timer_sel,TIMER_COMPARER_OUTPUT1,0x733);
    TIMER_SET_COMPARER3_VALUE1_0(timer_sel,TIMER_COMPARER_INV,0x7569);
    TIMER_SET_COMPARER3_VALUE1_1(timer_sel,TIMER_COMPARER_INV,0x7227);

    TIMER_SET_CMD(timer_sel,TIMER_CMD_RUN);
    while(1);
}


void TIMER_CAPTURER_EXAMPLE(u32 timer_sel)
{
    INTDEV_SET_CLK_RST(timer_sel,(INTDEV_RUN|INTDEV_IS_GROUP0 | INTDEV_CLK_IS_CORECLK));

    TIMER_SET_OUTPUT_EN(timer_sel,(TIMER_P0_OUTPUT_ENABLE | TIMER_P1_OUTPUT_ENABLE | TIMER_P2_OUTPUT_ENABLE | TIMER_P3_OUTPUT_ENABLE| \
                                   TIMER_P4_OUTPUT_DISABLE | TIMER_P5_OUTPUT_DISABLE | TIMER_P6_OUTPUT_DISABLE | TIMER_P7_OUTPUT_DISABLE));

    TIMER_SET_IN_PORT(timer_sel,(TIMER_CAPTURER0_IS_P7 \
                               | TIMER_CAPTURER2_IS_P6 \
                               | TIMER_CAPTURER1_IS_P5 \
                               | TIMER_CAPTURER3_IS_P4) \
                     );
    //TIMER_SET_OUT_PORT(timer_sel,(TIMER_P0_IS_COMPARER0|TIMER_P1_IS_COMPARER1|TIMER_P3_IS_COMPARER2|TIMER_P2_IS_COMPARER3));

    TIMER_SET_OVERRIDE_GPIO(timer_sel,(TIMER_P7_OVERRIDE_GPIO | TIMER_P7_INPUT_ENABLE | TIMER_P7_PULL_UP| \
                                       TIMER_P6_OVERRIDE_GPIO | TIMER_P6_INPUT_ENABLE| \
                                       TIMER_P5_OVERRIDE_GPIO | TIMER_P5_INPUT_ENABLE| \
                                       TIMER_P4_OVERRIDE_GPIO | TIMER_P4_INPUT_ENABLE) \
                            );

    //TIMER_SET_COMPARER_MODE(timer_sel,(TIMER_COMPARER3_NOT_FORCE|TIMER_COMPARER2_NOT_FORCE|TIMER_COMPARER1_NOT_FORCE|TIMER_COMPARER0_NOT_FORCE));

    TIMER_SET_MAIN_CNT_BEGIN_VALUE0(timer_sel, TIMER_MAIN_CNT_COUNT_UP, 0x00000000);
    TIMER_SET_MAIN_CNT_END_VALUE0(timer_sel, 0x00100000);
    TIMER_SET_MAIN_CNT_BEGIN_VALUE1(timer_sel, TIMER_MAIN_CNT_COUNT_UP, 0x00e00000);
    TIMER_SET_MAIN_CNT_END_VALUE1(timer_sel, 0x00f00000);
    TIMER_SET_CMD(timer_sel, TIMER_CMD_RESTART);

    TIMER_SET_CAPTURER_MODE(timer_sel,(TIMER_CAPTURER0_FILTER_ENABLE \
                                     | TIMER_CAPTURER0_RISING_EDGE \
                                     | TIMER_CAPTURER0_FALLING_EDGE \
                                     | TIMER_CAPTURER1_RISING_EDGE \
                                     | TIMER_CAPTURER3_FALLING_EDGE) \
                            );

    u8 capturer0_data_rp=0;
    u8 capturer1_data_rp=0;
    u8 capturer2_data_rp=0;
    u8 capturer3_data_rp=0;

    capturer0_data_rp=TIMER_GET_CAPTURE0_WP(timer_sel);
    capturer1_data_rp=TIMER_GET_CAPTURE1_WP(timer_sel);
    capturer2_data_rp=TIMER_GET_CAPTURE2_WP(timer_sel);
    capturer3_data_rp=TIMER_GET_CAPTURE3_WP(timer_sel);

    volatile u32 capturer0_data_temp[8];
    volatile u32 capturer1_data_temp[8];
    volatile u32 capturer2_data_temp[8];
    volatile u32 capturer3_data_temp[8];

    TIMER_SET_CMD(timer_sel,TIMER_CMD_RUN);

    while(1){
        if((capturer0_data_rp&0x1)!=TIMER_GET_CAPTURE0_WP(timer_sel)){
            capturer0_data_temp[capturer0_data_rp]=TIMER_GET_CAPTURE0_VALUE(timer_sel,capturer0_data_rp);
            capturer0_data_rp++;
            capturer0_data_rp&=0x7;
        }
        if((capturer1_data_rp&0x1)!=TIMER_GET_CAPTURE1_WP(timer_sel)){
            capturer1_data_temp[capturer1_data_rp]=TIMER_GET_CAPTURE1_VALUE(timer_sel,capturer1_data_rp);
            capturer1_data_rp++;
            capturer1_data_rp&=0x7;
        }
        if((capturer2_data_rp&0x1)!=TIMER_GET_CAPTURE2_WP(timer_sel)){
            capturer2_data_temp[capturer2_data_rp]=TIMER_GET_CAPTURE2_VALUE(timer_sel,capturer2_data_rp);
            capturer2_data_rp++;
            capturer2_data_rp&=0x7;
        }
        if((capturer3_data_rp&0x1)!=TIMER_GET_CAPTURE3_WP(timer_sel)){
            capturer3_data_temp[capturer3_data_rp]=TIMER_GET_CAPTURE3_VALUE(timer_sel,capturer3_data_rp);
            capturer3_data_rp++;
            capturer3_data_rp&=0x7;
        }
    }
}
